The present invention pertains to integrated circuits and more particularly to an arrangement for preventing tampering with stored information of integrated circuits.
Modern day electronic systems have sensitive and confidential information which must be protected from unauthorized disclosure. Examples of such sensitive or confidential information include the personal identification number (PIN) or passwords in an automatic transfer machine (ATM), cryptographic keying material in a communication security (COMSEC) system, access codes in alarm systems, monetary balances in data cards, etc. This sensitive or confidential information typically resides in an integrated circuit semiconductor device, such as flip-flops and memory cells.
Some systems protect this sensitive or confidential information by sophisticated mechanical enclosures with tamper detection switches and associated circuitry. Password protected systems protect the critical or confidential information with firmware based protocols which disallow information extraction unless a proper password is presented. Such methods of protection are inadequate against skilled adversaries.
The semiconductor industry has developed sophisticated tools for semiconductor device evaluation, design validation, trouble-shooting, and fault analysis. These tools allow extraction of information such as the state of internal flip-flops by charge monitoring, circuit functions by X-rays and scanning electron microscopes, dynamic data monitoring by radiation and infrared sensing, microprobing directly onto circuit nodes, and exposing internal circuit nodes via laser drilling and ion milling.
Accordingly, it would be highly desirable to provide an arrangement for tamperproofing basic semiconductor devices at the monolithic integrated circuit level and thereby preventing data extraction of sensitive or confidential information.